x86: Intel CPU family update

... according to revision 49 of the Intel SDM.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>

diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
index ab86c75355534ec47a2c562183ecf1caa7f47aab..6aaa7abac2c8393d640e160901b8f7d8aab38e45 100644 (file)
--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -139,6 +139,9 @@ static void do_get_hw_residencies(void *arg)
     case 0x3F:
     case 0x45:
     case 0x46:
+    /* future */
+    case 0x3D:
+    case 0x4E:
         GET_PC2_RES(hw_res->pc2);
         GET_CC7_RES(hw_res->cc7);
         /* fall through */

diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 94dc968d41a94f6be042d2e4ca8ba9ae572f22ed..94f3db2d5fdaa291ce87447f7ed89eb3e60d84ce 100644 (file)
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -1966,10 +1966,14 @@ static const struct lbr_info *last_branch_msr_get(void)
         case 58: case 62:
         /* Haswell */
         case 60: case 63: case 69: case 70:
+        /* future */
+        case 61: case 78:
             return nh_lbr;
             break;
         /* Atom */
-        case 28:
+        case 28: case 38: case 39: case 53: case 54:
+        /* Silvermont */
+        case 55: case 74: case 77: case 90: case 93:
             return at_lbr;
             break;
         }

diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c
index 8b23afa489fc7495d4c62b1883df8ae8e90c013e..3129ebd5c44e7930aa04ebcd29856f3e0adc4915 100644 (file)
--- a/xen/arch/x86/hvm/vmx/vpmu_core2.c
+++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c
@@ -916,6 +916,10 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int vpmu_flags)
         case 0x3f:
         case 0x45:
         case 0x46:
+
+        /* future: */
+        case 0x3d:
+        case 0x4e:
             ret = core2_vpmu_initialise(v, vpmu_flags);
             if ( !ret )
                 vpmu->arch_vpmu_ops = &core2_vpmu_ops;